Methodology for Structured Data-Path Implementation in VLSI Physical Design: A Case Study

State-of-the-art modern microprocessor and domain-specific accelerator designs are dominated by data-paths composed of regular structures, also known as bit-slices. Random logic placement routing techniques may not result in an optimal layout for these data-path-dominated designs. As a result, implementation tools such Cadence’s Innovus include Structured Data-Path (SDP) feature that allows data-path to be completely customized constraining the engine. A relative file is used provide constraints tool. However, tool neither extracts nor automatically places structures. In other words, generated. this paper, we propose semi-automated method extracting bit-slices from SDP flow. It has been demonstrated proposed results 17% less density or use pixel buffer design. At same time, performance metrics unchanged when compared traditional place route